ASYNC 2008
14th IEEE International Symposium on Asynchronous Circuits and Systems
7th-11th April 2008, Newcastle University, UK. Collocated with NOCS 2008 and preceded by System Level Interconnect Prediction (SLIP) 2008 on 5th-6th April 2008.
The International Symposium on Asynchronous Circuits and Systems provides a high quality forum for scientists and engineers to present their latest research findings. Authors are invited to submit full papers on all aspects of asynchronous design.
Conference Schedule and Campus Map
Call For Papers
View in PDF format
Important Dates
- Abstract registration: 8th October 2007
- Full paper submission: 15th October 2007
- Notification of acceptance: 12th December 2007
- Final version due: 18th January 2008
- Early registration deadline: 7th March 2008
- Late registration deadline: 21st March 2008
Technical Scope
Topics of interest include, but are not limited to:
- Mixed synchronous/asynchronous architectures, interfaces, and circuits.
- Design, synthesis and Verification techniques for GALS systems.
- Synchronous-asynchronous interaction at different levels.
- High-speed/low-power asynchronous logic, memories, and interconnects.
- High-level design and synthesis of self-timed circuits.
- Physical design of unclocked logic and pipelines.
- Formal methods for correctness and performance analysis of asynchronous designs.
- Test, reliability, security, and radiation tolerance.
- CAD for asynchronous design and validation.
- Asynchronous System-on-Chip (SoC), System-in-Package (SiP).
- Novel asynchronous architectures.
- Asynchrony and latency tolerance in system-level design.
- Motivating case studies, comparisons, and applications.
- Embedded System Design with asynchronous architectures/implementations.
- Asynchronous design for manufacturing.
Papers must be submitted via the conference web site. Papers will be evaluated by the program committee and reviews will be based on scientific merit, innovation, relevance, and presentation. New idea papers are encouraged, and the program committee recognizes that such papers may contain less evaluation than papers in established areas. Accepted papers will be published in an IEEE proceedings and distributed at the symposium.
The authors of the papers accepted for ASYNC'08 will be particularly encouraged to submit the extended versions of their papers to the IEEE Transactions on VLSI Systems Special Section on Asynchronous Circuits and Systems.
Sponsored By
